2006-10-06

NAND Flash

NAND memories



NAND flash memories cannot provide execute-in-place due to their different construction principles. These memories are accessed much like block devices such as hard disks or memory cards. The blocks are typically 512 or 2048 bytes in size. Associated with each block are a few bytes (typically 12–16 bytes) that should be used for storage of an error detection and correction block checksum.



NAND devices typically have software-based bad block management. This means that when a logical block is accessed it is mapped to a physical block, and the device has a number of blocks set aside for compensating bad blocks and for storing primary and secondary mapping tables.



The error-correcting and detecting checksum will typically correct an error where one bit in the block is incorrect. When this happens, the block is marked bad in a logical block allocation table, and its (still undamaged) contents are copied to a new block and the logical block allocation table is altered accordingly. If more than one bit in the memory is corrupted, the contents are partly lost, i.e. it is no longer possible to reconstruct the original contents. Some devices may even come with a pre-programmed bad block table from the manufacturer, since it is sometimes impossible to manufacture error-free NAND memories.



The first error-free physical block (block 0) is always guaranteed to be readable and free from errors. Hence, all vital pointers for partitioning and bad block management for the device must be located inside this block (typically a pointer to the bad block tables etc). If the device is used for booting a system, this block must contain the master boot record.



When executing software from NAND memories, virtual memory strategies are used: memory contents must first be paged or copied into memory-mapped RAM and executed there. A memory management unit (MMU) in the system is helpful, but this can also be accomplished with overlays.



For this reason, some systems will use a combination of NOR and NAND memories, where a smaller NOR memory is used as software ROM and a larger NAND memory is partitioned with a file system for use as a random access storage area.

 

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